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digital_clock_design
- 利用VHDL语言，逻辑器件设计CPLD，实现数字钟-Using VHDL language, design of logic devices CPLD, digital clock
PhaseLockedLoop
- This tutorial starts with a simple conceptual model of an analog Phase-Locked Loop (PLL). Through elaboration it ends at a model of an all digital and fixed-point phase-locked loop. The final model can serve a starting point for code generation (both
timing_recovery
- 我对一个输入调制信号：采样率FS=1200K，中心频率F0=300K，带宽300K。输入信号为一个[样点数,2]的矩阵,即I,Q两路. 进行频谱搬移，分为I，Q分量两路进行矢量乘法，NCO的设置为FC=300K，t=样点数乘以1/FS， 乘完以后我的频谱上显示竟然信号带宽增加了300K，但是中心频率没有改变，请问各位朋友是哪儿出了问题？谢谢您的阅读和意见-Digital Down Converter for matlab realized, certain design speci
digital_down_convertation
- 我对一个输入调制信号：采样率FS=1200K，中心频率F0=300K，带宽300K。输入信号为一个[样点数,2]的矩阵,即I,Q两路. 进行频谱搬移，分为I，Q分量两路进行矢量乘法，NCO的设置为FC=300K，t=样点数乘以1/FS， 乘完以后我的频谱上显示竟然信号带宽增加了300K，但是中心频率没有改变，请问各位朋友是哪儿出了问题？谢谢您的阅读和意见-Digital Down Converter for matlab realized, certain design speci
Design-Recipes-for-FPGAs
- that the fpga design for digital circuit and new technology design
ICtester
- The chip tester verifies the functionality and timing of a variety of 7400 series integrated circuits. Students taking Digital Logic Design Lab, Use these chips often in their laboratory. The IC to be tested should be placed on the ZIF socket and t
DigitalLogic
- 组合逻辑电路、时序逻辑电路及数字逻辑电路系统的设计、安装、测试方法-Combinational logic circuits, sequential logic circuits and digital logic circuit system design, installation, testing methods
FPGA-DDC
- 基于FPGA的直接数字频率合成器的设计和实现。-FPGA-Based Direct Digital Frequency Synthesizer Design and Implementation.
Special_filters
- Special digital filters design using the window method Hilbert, differentiator, interpolator in Matlab
Digital_Filter_Banks
- A digital filter bank design descr iption
digitalfilter_in_C_language
- We have to design a second order Butterworth filter having a sampling frequency of 20 kHz and -3db cut of frequency at 2 kHz in visual C. Only low frequency signals can pass through this filter and the signals having the frequency higher than frequen
LPF
- IIR低通数字滤波器在MATLAB中的设计方法-Low-pass IIR digital filter design in MATLAB method
DigitalVoltageMeter
- 数字电压表该利用单片机AT89S51与ADC0809设计一个数字电压表，能够测量0－5V之间的直流电压值，四位数码显示，但要求使用的元器件数目最少。-Digital voltage meter to the use of microcontroller AT89S51 with the design of a digital voltmeter ADC0809, capable of measuring 0-5V DC voltage between the value of four digi
5VDigitalVoltmeter
- 本设计实现了5伏数字电压表的设计，应用51芯片和ADC0808芯片，并含有proteus仿真原理图，供大家参考学习！-This design achieved a 5-volt digital voltmeter design, application of 51 chips and ADC0808 chip, and contains proteus simulation schematic for your reference to learn!
IIR_digital_filter_design
- IIR数字滤波器设计:用双线变化法及脉冲响应不变法，用Matlab编程，设计低通、高通、带通IIR数字滤波器-IIR Digital Filter Design: A two-constant changes in law and the impulse response method, using Matlab programming, designing low-pass, high pass, band-pass IIR digital filter
FIRfilters
- FIR数字滤波器的设计，利用各种窗函数设计各种类型的数字滤波器。-FIR digital filter design, using a variety of window function design of various types of digital filters.
VerilogHDLcourse
- Verilog数字系统设计教程，作者夏宇闻电子书籍-Verilog digital system design tutorials, e-books by XIA Yu-Wen
dds_001
- 基于Matlab和AccelDSP开发工具设计的一个数字频率综合器实例（DDS）。可以参考学习如何使用AccelDSP。-AccelDSP development tools based on Matlab and the design of an instance of a digital frequency synthesizer (DDS). Can refer to learn how to use AccelDSP.
1632driver
- 是一种显示驱动器，它广泛应用在数字时钟、温度计、湿度计等工业仪器仪表显示中。 步行小绿人是利用驱动由个×点阵块组成的×点阵幕来显示小緑人行走动画。采为主芯片来控制进行数据传输，通过三根线数据写入。 有两种显示方式：此设计采用显示方式。 步行小绿人由幅不同姿势的画面来完成一个走路动作。按键用来改变小绿人动作状态。 - is a display driver, it is widely used
Verilog_Digital_Design_Synthesis
- Verilog HDL A guide to Digital Design and Synthesis Samir Palnitkar SunSoft Press 1996